Test

 Jet Technologies, Inc.

Lloyd Doyle  Automatic Optical Tester [AOT]

The EXCALIBUR range of machines use reflective light based systems. A high power Xenon lamp is used in conjunction with high frequency ccd camera circuitry to gain a working image from the pcb. Sophisticated image processing including dual image processing and multi level greyscale processing yields a 100% representation of the circuit under test for detailed fault analysis.

Lloyd Doyle patented AOT fault detection algorithms are then employed to find all functional and cosmetic faults on the panels. A detailed fault report of the optical test is generated and can be used for on-line or off-line repair as applicable.

Automatic Optical Test (AOT) is a revolutionary approach to the process of finding faults on printed circuit boards. It brings to the circuit board manufacturer, a concept that has definite benefits over existing fault detection processes such as Automatic Optical Inspection (AOI) and Electrical Test (ET).

AOT combines the fault detection logic of conventional probe-type ET machines with the optical scanning of inspection machines to give a viable, accurate fault report for the printed circuits under investigation.

his unique method is based on pattern connectivity as its reference for fault detection and is particularly relevant when analysing printed circuit boards. In the realms of general electronics, a printed circuit board should be regarded purely and simply as an interconnection device. To understand why this approach is so different and beneficial to the PCB manufacturer, it is necessary to look at the background of both AOI systems and ET systems.

AOI has been at the heart of PCB manufacturing for many years. Efficient use of AOI equipment can mean the difference between 'profit and loss' for the board manufacturer, but equally poor use of such equipment can be a waste of time and resources having very little effect on the bottom line It is well known in the PCB manufacturing industry that the results from some AOI operations can be somewhat subjective.

So what is it that makes the difference between good and bad performance of such expensive machinery? Is it software, hardware, illumination systems, lamps, lasers, or operators? - the list of contributing factors to the overall efficiency of the inspection process is endless.  Undoubtedly, all these factors influence the overall performance of the machine, but the attribute that ultimately determines the overall fault detection capability of any test or inspection system is the fault detection algorithm employed by that system.

Integri-Test flying probe electrical tester

This unit has been enhanced with retro-fitted feather light probes, which improve probe speed and eliminate pad marking, and in-line inspection cameras. This is a testing system that utilizes two computer controlled moving probes that test every point on any bare circuit board. It tests for shorts, opens and high resistance leakage. Because of it's sequential nature, it is essentially gridless, testing points at any location with spacings as close as 0.020 inches.

To test a particular circuit board, a net list is entered with the "X" and "Y" positions of the active points in each net. The operating program sorts this data for routing of the probes in the most efficient manner. A board is loaded onto the tester and the dual measuring probes are then directed to test every active point on the board at the rate of 250 points per minute. Electrical testing is achieved, under computer control, based on information given in the customer's gerber files, eliminating the need for costly fixtures.

Fundamentally, testing is performed utilizing a combination of both capacitance and resistance. A board is placed on a dielectric surface on the bottom of which a conductive plate is mounted. The capacitance between this plate and each net is measured using a precision high speed capacitance meter. At the start of a test, a small quantity of boards are learned by measuring the capacitance of every point in each net with respect to the conductive plate. The computer then statistically derives the expected capacitance of each net on a perfect board, creating a test standard. With this concept, testing any point in a good net should give the same capacitance reading as the test standard value. If a net has a fault, such as a short or open, it will be flagged because of it's variation from the expected value. For example, if a good net should measure 15 PF, but actually measures 5 PF, an error record is written as a suspected short. Since a short will have created increased and similar capacitance values in two independent nets, these two nets will be flagged as probably being shorted. When all testing is completed, these faults will be verified by reprobing, using the resistance meter. Testing of resistive segments and opens in a net are performed during the first measurement taken of each net. At this time both probes are directed to the end points of each net to test for continuity. A current of 300 milliamps is forced through the net, via two probes and the resulting voltage drop is compared to a corresponding voltage drop that is converted from a programmable resistance threshold of 1-127 ohms set at the beginning of the test. This test will quickly identify a resistance segment in the net as well as an open. High resistance leakage between nets is detected during capacitance testing and confirmed during the verification phase of testing. After all the testing has been completed, the probes will be directed back to the nets that were identified as suspected shorts. A 40 volt pulse will be placed across these nets via the two probes and the leakage resistance will be compared to one of the five user selected resistance values (usually set at 1 megohm), to verify the suspected shorts and leakage. During the test phase, if the probes should measure a point and obtain an incorrect reading, the system is programmed to tap the point again to be sure that the probe has not made a bad connection. At the conclusion of this test phase a printer will produce an error report for the board under test. The report will identify by number the nets that are shorted or opened and the "X" , "Y" coordinates of any test points involved. Conversely, error-free boards are identified with a passed message to the operator, then released for approval markings.